首页> 外国专利> METHOD FOR FABRICATING FLOATING GATE OF FLASH MEMORY DEVICE TO IMPROVE COUPLING RATIO AND REDUCE VOLTAGE APPLIED TO CONTROL GATE

METHOD FOR FABRICATING FLOATING GATE OF FLASH MEMORY DEVICE TO IMPROVE COUPLING RATIO AND REDUCE VOLTAGE APPLIED TO CONTROL GATE

机译:制造闪存器件的浮动栅极以提高耦合比并降低应用于控制栅极的电压的方法

摘要

PURPOSE: A method for fabricating a floating gate of a flash memory device is provided to improve a coupling ratio and reduce a voltage applied to a control gate by increasing the area of a floating gate. CONSTITUTION: Polysilicon is formed on a silicon substrate. Dopants are injected to the polysilicon. A photoresist pattern is formed and etched on the polysilicon. The polysilicon is formed on the silicon substrate on which a gate oxide layer is grown. The injected dopants are diffused by an annealing process.
机译:目的:提供一种用于制造闪存器件的浮栅的方法,以通过增加浮栅的面积来提高耦合比并减小施加至控制栅的电压。组成:多晶硅是在硅衬底上形成的。将掺杂剂注入到多晶硅中。在多晶硅上形成并蚀刻光致抗蚀剂图案。在其上生长有栅极氧化物层的硅衬底上形成多晶硅。注入的掺杂剂通过退火工艺扩散。

著录项

  • 公开/公告号KR20050014351A

    专利类型

  • 公开/公告日2005-02-07

    原文格式PDF

  • 申请/专利权人 DONGBUANAM SEMICONDUCTOR INC.;

    申请/专利号KR20030052944

  • 发明设计人 SONG JUNG GYUN;

    申请日2003-07-31

  • 分类号H01L27/115;

  • 国家 KR

  • 入库时间 2022-08-21 22:05:52

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