首页> 外国专利> METAL OXIDE SEMICONDUCTOR TRANSISTOR HAVING THREE-DIMENSIONAL CHANNELS TO PREVENT REDUCTION OF CONTACT AREA BETWEEN SOURCE AND DRAIN REGIONS AND FABRICATING METHOD THEREOF

METAL OXIDE SEMICONDUCTOR TRANSISTOR HAVING THREE-DIMENSIONAL CHANNELS TO PREVENT REDUCTION OF CONTACT AREA BETWEEN SOURCE AND DRAIN REGIONS AND FABRICATING METHOD THEREOF

机译:具有三维通道的金属氧化物半导体晶体管,可防止源区和漏区之间的接触面积减小及其制造方法

摘要

PURPOSE: A metal oxide semiconductor transistor having three-dimensional channels and a fabricating method thereof are provided to prevent reduction of a contact area between source and drain regions by forming a trench within a semiconductor substrate. CONSTITUTION: An active region is projected from a predetermined region of a semiconductor substrate. An isolation layer(21A) is used for surrounding the active region and has a surface lower than an upper surface of the active region. At least one center trench is used for defining a plurality of channel regions recessed from a center part of the active region and a source/drain region for connecting both ends of the channel regions to each other. A gate electrode(25A) is used for covering sidewalls and upper surfaces of the channel regions across upper parts of the channel regions.
机译:用途:提供具有三维沟道的金属氧化物半导体晶体管及其制造方法,以通过在半导体衬底内形成沟槽来防止源极区和漏极区之间的接触面积减小。构成:有源区从半导体衬底的预定区域突出。隔离层(21A)用于围绕有源区,并且具有比有源区的上表面低的表面。至少一个中心沟槽用于限定从有源区的中心部分凹进的多个沟道区和用于将沟道区的两端彼此连接的源极/漏极区。栅电极(25A)用于跨越沟道区的上部覆盖沟道区的侧壁和上表面。

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