首页> 外国专利> METHOD OF MANUFACTURING FIELD EFFECT TRANSISTOR OF SEMICONDUCTOR DEVICE FOR FORMING GATE INSULATING LAYER HAVING BOTTOM FACE WIDER THAN TOP FACE

METHOD OF MANUFACTURING FIELD EFFECT TRANSISTOR OF SEMICONDUCTOR DEVICE FOR FORMING GATE INSULATING LAYER HAVING BOTTOM FACE WIDER THAN TOP FACE

机译:制造半导体器件的场效应晶体管的方法,该器件用于形成绝缘层,该绝缘层具有比顶部表面更底部的表面

摘要

PURPOSE: A method of manufacturing a field-effect-transistor of a semiconductor device is provided to improve the yield and the current performance by preventing a GOI(Gate On insulator) fail and increasing a width of a transistor. CONSTITUTION: A first insulating layer is formed on a semiconductor substrate. A first conductor is formed thereon to form a pin. A voltage control region is formed by an ion implantation process. A gate insulating layer is formed by performing a thermal process. A second conductor is formed by depositing a conductor thereon and patterning the conductor. An LDD(Lightly doped drain) region is formed by an ion implantation process. A spacer(8) is formed by depositing and etching an insulating layer. A source/drain is formed by implanting ions(9).
机译:用途:提供一种制造半导体器件的场效应晶体管的方法,以通过防止GOI(绝缘栅上栅极)失效并增加晶体管的宽度来提高产量和电流性能。构成:在半导体衬底上形成第一绝缘层。在其上形成第一导体以形成销。通过离子注入工艺形成电压控制区。通过执行热处理来形成栅极绝缘层。通过在其上沉积导体并图案化该导体来形成第二导体。通过离子注入工艺形成LDD(轻掺杂漏极)区域。通过沉积和蚀刻绝缘层来形成隔离物(8)。通过注入离子来形成源/漏(9)。

著录项

  • 公开/公告号KR20050022792A

    专利类型

  • 公开/公告日2005-03-08

    原文格式PDF

  • 申请/专利权人 DONGBUANAM SEMICONDUCTOR INC.;

    申请/专利号KR20030060520

  • 发明设计人 PARK JEONG HO;

    申请日2003-08-30

  • 分类号H01L21/336;

  • 国家 KR

  • 入库时间 2022-08-21 22:05:43

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