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Method for simultaneous forming of different gate regions of FET structure, starting with silicon substrate with two FET regions and simultaneous formation of stray layer over both FET regions
Method for simultaneous forming of different gate regions of FET structure, starting with silicon substrate with two FET regions and simultaneous formation of stray layer over both FET regions
Method starts with semiconductor silicon substrate (1) with two FET regions (A,B) followed by formation of stray layer over both regions. Then first implantation of first foreign ions is carried out through stray layer into both regions.Then resulting structure is simultaneously tempered to form first FET through with first profile of foreign ions. Next stray layer is removed and gate dielectric film (10a) is thermaly formed from first through profile. Then follows second implant of second foreign ions for specified formation of second through profile (TTP).
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