Semiconductor memory device for use as static random access memory, has memory cell storing data, where memory cell includes to inverters including load elements and driving elements having N channel metal oxide semiconductor transistors

摘要

A semiconductor memory device, comprises memory cell storing data; and word line and pair of bit lines connected to memory cell. The memory cell includes first inverter including first load element and first driving element having N channel metal oxide semiconductor (MOS) transistor; and second inverter cross-coupled with first inverter, including a second load element and a second driving element having another N channel MOS transistor. A semiconductor memory device, comprises a memory cell storing data; and a word line and a pair of bit lines connected to the memory cell. The memory cell includes: (1) a first inverter including a first load element and a first driving element having an N channel metal oxide semiconductor (MOS) transistor; (2) a second inverter cross-coupled with the first inverter, including a second load element and a second driving element having another N channel MOS transistor; (3) first and second storage nodes connected respectively to output nodes of the first and second inverters; (4) first and second gate elements each including a P channel MOS transistor having a gate electrode (218, 220) connected to the word line, connecting the first and second storage nodes to one bit line and the other bit line of the pair of bit lines, respectively; (5) a first metal interconnection (276) forming the first storage node and provided stacked on the first driving element and the first gate element formed on a substrate surface; and (6) a second metal interconnection forming the second storage node and provided stacked on the second driving element and the second gate element formed on the substrate surface. The first and second load elements are provided above the first and second metal interconnections.