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A method of modeling the crossover current component in submicron cmos integrated circuit designs

机译:亚微米CMOS集成电路设计中交叉电流分量建模的方法

摘要

A method of calculating a crossover current component of dynamic power dissipation at a gate of a CMOS integrated circuit design is operable on a digital computer. The method includes deriving two constants. An effective width is computed for the gate, a transition time is computed at an input of the gate, an activity ratio is determined for the gate, and a load capacitance is computed at an output of the gate. The effective width is multiplied by the activity ratio, the clock rate, and the difference of the first constant multiplied by the transition time and the second constant multiplied by the load capacitance to determine a crossover current component of dynamic power of the gate.
机译:计算在CMOS集成电路设计的栅极处的动态功耗的交叉电流分量的方法可在数字计算机上操作。该方法包括导出两个常数。为该栅极计算有效宽度,在该栅极的输入处计算过渡时间,为该栅极确定活度比,并在该栅极的输出处计算负载电容。有效宽度乘以活度比,时钟速率以及第一常数与过渡时间的乘积和第二常数与负载电容的乘积,以确定栅极动态功率的交叉电流分量。

著录项

  • 公开/公告号GB2386721B

    专利类型

  • 公开/公告日2005-11-09

    原文格式PDF

  • 申请/专利权人 * HEWLETT-PACKARD COMPANY;

    申请/专利号GB20030004013

  • 发明设计人 THOMAS W * CHEN;

    申请日2003-02-21

  • 分类号G06F17/50;

  • 国家 GB

  • 入库时间 2022-08-21 21:57:43

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