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Testing, Design and Modeling Issues in Radiation-Hardened CMOS Integrated Circuits

机译:辐射强化CmOs集成电路的测试,设计和建模问题

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Continued research and greater understanding of ionization damage mechanisms in silicon/silicon dioxide structures will lead to improved total dose modeling techniques and a better definition of proper total dose testing conditions. Combining computer models with laboratory test data will allow engineers to predict the total dose response of components for irradiation periods ranging from years to less than a second. Recent progress in the understanding of dose-rate phenomena in integrated circuits has identified ''Rail Span Collapse'' as a possible upset mechanism. Use of this model aids the design of ICs expected to have an upset level above 1E10 rad(Si)/sec. Further research into photo current generation, rail span collapse, and local upset mechanisms will allow maximization of IC upset levels. (ERA citation 11:023772)

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