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Testing integrated circuits using capacitive coupling
Testing integrated circuits using capacitive coupling
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机译:使用电容耦合测试集成电路
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摘要
An apparatus and method for testing a semiconductor device in an AC test regime. The test apparatus includes a test plate 210 capacitively coupled to the signal terminals 202,206 of the integrated circuit. The test plate 210 is coupled to a test receiver circuit 220 to receive and output the data signal detected at the test plate 210 capacitively coupled to the signal terminals 202,206. Alternatively, the test plate 210 is coupled to a test transmitter circuit to transmit data signals to signal terminals through the capacitively coupled test plate. A test unit can be coupled to the semiconductor device to evaluate the detected data signal against test criteria. Testing and evaluation is accomplished by capacitively coupling a test plate to a plurality of signal terminals. Data signals transmitted from a signal terminal 202,206 and detected by the test plate 210 or transmitted from the test plate 210 and detected by the signal terminals 202,206 are evaluated against a test criteria. The semiconductor device is part of an integrated circuit and may be capacitively coupled to other devices in operation via terminals 202,206. In normal operation the test plate 210 is grounded.
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