PROBLEM TO BE SOLVED: To provide a clustered superscalar processor in which the miss rate of register caches is reduced to reduce the probability of miss penalties and thus enhance performance, and a method for controlling communications between clusters of the clustered superscalar processor.;SOLUTION: Before an instruction is written into an instruction window, a check is made to see if there is any dependence relation among prior instructions in the instruction window. When there is a dependence, the cluster to which the instruction is allocated is requested to communicate data in response to the instruction. The results of execution of the instruction requested are selectively communicated over a wide range to the register caches of the cluster designated.;COPYRIGHT: (C)2006,JPO&NCIPI
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