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Clustered superscalar processor and communication control method between clusters in clustered superscalar processor
Clustered superscalar processor and communication control method between clusters in clustered superscalar processor
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机译:集群超标量处理器及其集群中的通信控制方法
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摘要
A clustered superscalar processor for reducing the miss rate of a register cache and reducing the possibility of miss penalties. The processor checks before storing an instruction in an instruction window whether there is a data dependency relationship between the instruction that will be stored in the instruction window and a previous instruction stored in the instruction window. When there is a data dependency relationship, the execution result of the previous instruction of one cluster is communicated to a register cache of another cluster that executes the instruction having a data dependency relationship with the previous instruction.
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