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Non-volatile memory device supporting high-parallelism test at wafer level
Non-volatile memory device supporting high-parallelism test at wafer level
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机译:非易失性存储设备,支持晶圆级的高并行度测试
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摘要
A non-volatile memory device includes a chip of semiconductor material. The chip includes a memory and control means for performing a programming operation, an erasing operation and a reading operation on the memory in response to corresponding external commands. The chip further includes testing means for performing at least one test process including the repetition of at least one of said operations by the control means, and a single access element for enabling the testing means.
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