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System and method for automatic recognition of soft errors in latches of an integrated circuit

机译:自动识别集成电路锁存器中的软错误的系统和方法

摘要

A circuit and method for detecting soft errors produced in latches. An exemplary embodiment of a circuit includes a block of concatenated latches, each latch having a comparator, with an output from the final latch comparator representing a parity bit for the latch block. The circuit further includes a element to store the block parity bit, and a comparator for the block parity bit and stored parity bit. A latch soft error is detected by monitoring an output from the parity bit comparator, which signals an error when the latch block parity bit changes state.
机译:用于检测在锁存器中产生的软错误的电路和方法。电路的示例性实施例包括级联锁存器块,每个锁存器具有比较器,来自最终锁存器比较器的输出表示锁存器块的奇偶校验位。该电路还包括用于存储块奇偶校验位的元件,以及用于块奇偶校验位和存储的奇偶校验位的比较器。通过监视奇偶校验位比较器的输出来检测锁存器软错误,当锁存器块奇偶校验位更改状态时,该输出会发出错误信号。

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