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A semiconductor integrated circuit device having a sleep mode with a low current consumption and a small area requirement

机译:具有低电流消耗和小面积需求的睡眠模式的半导体集成电路器件

摘要

PROBLEM TO BE SOLVED: To reduce the occupied area of power supply constitution in a semiconductor integrated circuit including transistors(TRs) operated with low voltage and having low thresholds. ;SOLUTION: The semiconductor integrated circuit is provided with a power supply circuit consisting of a global power supply line VCC, a local power supply line QVCC and a global ground line VSS, a low threshold logical circuit 101 connected between the power supply line QVCC and the ground line VSS and an information storing circuit 103 connected between the power supply line VCC and the ground line VSS. The circuit 103 is provided with a low threshold transfer gate 114, a low threshold inverter 117 for receiving a signal from the gate 114 and high threshold inverters 116, 118 for connecting between the input and output of the inverter 117. Mode switch TRs 105, 119, 120 to be turned off in a stand-by mode are respectively connected between the output stage of the low threshold logical circuit 101 and the ground line VSS, between the inverter 117 and the power supply line VCC and between the inverter 117 and the ground line VSS.;COPYRIGHT: (C)1999,JPO
机译:要解决的问题:减少半导体集成电路中电源结构的占用面积,该半导体集成电路包括以低电压操作且具有低阈值的晶体管(TR)。 ;解决方案:半导体集成电路具有电源电路,该电源电路由全局电源线VCC,局部电源线QVCC和全局接地线VSS组成,低阈值逻辑电路101连接在电源线QVCC和接地线VSS和连接在电源线VCC和接地线VSS之间的信息存储电路103。电路103设置有低阈值传输门114,用于接收来自门114的信号的低阈值反相器117以及用于连接反相器117的输入和输出之间的高阈值反相器116、118。在低阈值逻辑电路101的输出级与接地线VSS之间,在反相器117与电源线VCC之间以及在反相器117与反相器117之间分别连接有待以待机模式关断的119、120。接地线VSS .;版权:(C)1999,JPO

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