Static memory device e.g. static RAM, has control unit that delivers low state logic signal on contact stud of integrated circuit, to flash clear memory cell, and changes polarization of substrate of transistor to supply voltage

摘要

The device has two CMOS inverters, where one inverter has an NMOS transistor (TN1) with a substrate electrically insulated from a substrate of an NMOS transistor (TN2) of the other inverter. The substrates are biased with a ground voltage. A control unit (MC) delivers a low state logic signal on a contact stud (PLT) of an integrated circuit with a memory cell (CEL), to flash clear the cell. The unit (MC) changes the polarization of the substrate of the transistor (TN1) to a supply voltage (VDD) and has a control NOT gate (IVC) connecting the substrate of the transistor (TN1) and the stud. An independent claim is also included for a method for flash clearing a memory device.