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Semiconductor device having n-channel type MOS transistor with gate electrode layer featuring small average polycrystalline silicon grain size

机译:具有n沟道型MOS晶体管的半导体器件,该n沟道型MOS晶体管的栅极电极层具有小的平均多晶硅晶粒尺寸

摘要

In a semiconductor device including a semiconductor substrate, and an n-channel type MOS transistor produced in the semiconductor substrate, the n-channel type MOS transistor includes a gate insulating layer formed on the semiconductor substrate and having a thickness of at most 1.6 nm, and a gate electrode layer on the gate insulating layer, and the gate electrode layer is composed of polycrystalline silicon which has an average grain size falling within a range between 10 nm and 150 nm in the vicinity of the gate insulating layer.
机译:在包括半导体衬底和在该半导体衬底中制造的n沟道型MOS晶体管的半导体器件中,n沟道型MOS晶体管包括形成在半导体衬底上并且具有至多1.6nm的厚度的栅极绝缘层。所述栅电极层由在所述栅绝缘层附近的平均粒径为10nm〜150nm的范围内的多晶硅构成。

著录项

  • 公开/公告号US2007080393A1

    专利类型

  • 公开/公告日2007-04-12

    原文格式PDF

  • 申请/专利权人 MITSUHIRO TOGO;TAKAYUKI SUZUKI;

    申请/专利号US20060635505

  • 发明设计人 MITSUHIRO TOGO;TAKAYUKI SUZUKI;

    申请日2006-12-08

  • 分类号H01L21/336;H01L29/788;

  • 国家 US

  • 入库时间 2022-08-21 21:07:10

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