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Flexible scheme for configuring programmable semiconductor devices using or loading programs from SPI-based serial flash memories that support multiple SPI flash vendors and device families
Flexible scheme for configuring programmable semiconductor devices using or loading programs from SPI-based serial flash memories that support multiple SPI flash vendors and device families
A method and structure for configuring a programmable logic device (PLD) from a serial peripheral interface (SPI) based serial memory. The type of the SPI memory is initially identified by the PLD. The PLD then selects the appropriate read command in response to the SPI memory type. The PLD then issues the read command to the SPI memory. In response, the SPI memory continuously provides a set of configuration data to the PLD. The PLD is configured in response to the configuration data. The PLD can identify the SPI memory type in response to control signals on pins of the PLD. Alternately, the PLD can identify the SPI memory type by performing a search. The search can include issuing a plurality of known read commands to the SPI memory, and then determining which read command causes the SPI memory to respond.
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