首页> 外国专利> METHOD AND APPARATUS TO SET A TUNING RANGE FOR AN ANALOG DELAY

METHOD AND APPARATUS TO SET A TUNING RANGE FOR AN ANALOG DELAY

机译:设置模拟延迟的调整范围的方法和装置

摘要

An apparatus and method for an analog fine delay line, a hybrid delay line, and a delay locked loop (DLL) is described. In the DLL, a coarse phase detector compares a reference signal and feedback signal in controlling coarse phase adjustment signals indicating whether a delay of a coarse delay line should be increased or decreased. Similarly, a fine phase detector compares the reference signal and feedback signal to generate a locking bias signal, which may increase or decrease a delay of an analog fine delay line. The analog fine delay line and coarse delay line may be connected in series creating the hybrid delay line having a total delay comprised of the coarse delay and the fine delay. Additionally, a fine bias generator may control the fine delay in response to an initiating bias signal from an analog phase generator or the locking bias signal.
机译:描述了一种用于模拟精细延迟线,混合延迟线和延迟锁定环(DLL)的设备和方法。在DLL中,粗略相位检测器在控制粗略相位调整信号时比较参考信号和反馈信号,该粗略相位调整信号指示应该增加还是减小粗略延迟线的延迟。类似地,精细相位检测器将参考信号与反馈信号进行比较以生成锁定偏置信号,该锁定偏置信号可以增加或减小模拟精细延迟线的延迟。可以将模拟精细延迟线和粗略延迟线串联连接,以创建具有总延迟的混合延迟线,该总延迟包括粗略延迟和精细延迟。另外,精细偏置发生器可以响应于来自模拟相位发生器的初始偏置信号或锁定偏置信号来控制精细延迟。

著录项

  • 公开/公告号EP1769581A1

    专利类型

  • 公开/公告日2007-04-04

    原文格式PDF

  • 申请/专利权人 MICRON TECHNOLOGY INC.;

    申请/专利号EP20050773401

  • 发明设计人 LIN FENG;

    申请日2005-07-21

  • 分类号H03L7/081;H03L7/087;H03L7/10;

  • 国家 EP

  • 入库时间 2022-08-21 20:44:59

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号