首页> 外国专利> Fabrication method of dual damascene interconnections of microelectronics device using filler having porogen

Fabrication method of dual damascene interconnections of microelectronics device using filler having porogen

机译:使用具有致孔剂的填料的微电子器件的双镶嵌互连的制造方法

摘要

Using the filler comprises a porous material produced is provided a wiring method of dual damascene microelectronic device that can minimize damage to the interlayer insulating film. Dual damascene method is connected to a via fill in with a filler comprising a porous material produced (porogen), by etching a part of the filler and an interlayer insulating film filling the via and the via to form a trench to be formed on the wiring. Subsequently, by removing the produced porous material of the filler remaining in the via after creating a porous filler material within, removing the porous filler and is produced, filling the trench and via a wiring material to complete the dual damascene wiring. ; Dual damascene, damage to the interlayer insulating film, the porous material produced
机译:使用包含产生的多孔材料的填料,提供了双镶嵌微电子器件的布线方法,该布线方法可以使对层间绝缘膜的损坏最小化。通过将部分填充物和填充该通孔和通孔的层间绝缘膜蚀刻以填充要在布线上形成的沟槽,从而将双金属镶嵌方法连接至通孔,该通孔填充有包含所产生的多孔材料(致孔剂)的填充物。 。随后,在内部形成多孔填充材料之后,通过去除残留在通孔中的填充的多孔材料,去除多孔填充物,并填充沟槽并通过布线材料完成双镶嵌布线。 ;双金属镶嵌,破坏层间绝缘膜,产生多孔材料

著录项

  • 公开/公告号KR100745986B1

    专利类型

  • 公开/公告日2007-08-06

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20040103088

  • 发明设计人 이경우;신홍재;김재학;

    申请日2004-12-08

  • 分类号H01L21/28;

  • 国家 KR

  • 入库时间 2022-08-21 20:31:37

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