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DESIGN METHOD OF MTCMOS SEMICONDUCTOR INTEGRATED CIRCUIT

机译:MTCMOS半导体集成电路的设计方法

摘要

A design method of an MTCMOS(MultiThreshold voltage Complementary Metal Oxide Semiconductor) semiconductor integrated circuit is provided to change a configuration of MTCMOS semiconductor IC by simply correcting a power rail of a switch cell without changing a logic cell. A logic cell(401) includes a logic circuit having a first transistor, which is connected between a source voltage supply line(VDD) and a virtual ground voltage supply line(VGND) and has a first threshold voltage. A switch cell(403) includes a second transistor, which is connected between the virtual ground voltage supply line and a ground voltage supply line and has a second threshold voltage. The second threshold voltage is higher than the first threshold voltage. The second transistor is turned off, when the logic circuit is turned on. The switch cell is arranged in a standard cell region. A power rail is pre-routed by using a PG(Power Ground)-connection scheme in a place-and-route process. The logic cells are arranged.
机译:提供一种MTCMOS(多阈值电压互补金属氧化物半导体)半导体集成电路的设计方法,以通过简单地校正开关单元的电源线而无需改变逻辑单元来改变MTCMOS半导体IC的配置。逻辑单元(401)包括具有第一晶体管的逻辑电路,该逻辑晶体管连接在源电压供应线(VDD)和虚拟接地电压供应线(VGND)之间并且具有第一阈值电压。开关单元(403)包括第二晶体管,该第二晶体管连接在虚拟地电压供应线和地电压供应线之间并且具有第二阈值电压。第二阈值电压高于第一阈值电压。当逻辑电路导通时,第二晶体管截止。开关单元布置在标准单元区域中。在布局布线过程中,通过使用PG(电源接地)连接方案对电源轨进行预布线。排列逻辑单元。

著录项

  • 公开/公告号KR100772269B1

    专利类型

  • 公开/公告日2007-11-01

    原文格式PDF

  • 申请/专利权人 DONGBU ELECTRONICS CO. LTD.;

    申请/专利号KR20060091809

  • 发明设计人 CHA WOOK JIN;

    申请日2006-09-21

  • 分类号H01L21/8238;H03K19/0175;H03K17/06;

  • 国家 KR

  • 入库时间 2022-08-21 20:31:06

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