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Semiconductor memory module e.g. buffered dual inline memory module, has third set of semiconductor memory components are arranged on module plate in series, proceeding in between two series of module plate
Semiconductor memory module e.g. buffered dual inline memory module, has third set of semiconductor memory components are arranged on module plate in series, proceeding in between two series of module plate
The module (100) has a plate (MP) with two ends (EMP1,EMP2), runs along a direction. The third set of semiconductor memory components (P5-P9) are arranged on the module plate (MP) in a series (R3), proceeding in between the two series of the module plate. The respective ends (EP9-1) of the third semiconductor memory components proceed along the direction. The semiconductor memory components (P1-P18) has two ends (EP1-1,EP1-2). The memory access of the semiconductor memory component is controlled by a control chip. A set of semiconductor memory components (P1-P4) are arranged on the module plate (MP) in a series (R1), proceeding edge-laterally along the end (EMP1) of the module plate (MP). The respective other ends (EP1-2) of the former semiconductor memory components proceed along the direction. The other set of semiconductor memory components (P10-P13) are arranged on the module plate (MP) in a series (R2), proceeding edge-laterally along the other end (EMP2) of the module plate. The respective other ends (EP13-2) of the former semiconductor memory components proceed along the direction.
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