BAD TIMING IMPROVEMENT APPARATUS OF INTEGRATED CIRCUIT, AND APPARATUS AND METHOD FOR DIAGNOSING BAD TIMING OF INTEGRATED CIRCUIT, AND INTEGRATED CIRCUIT

摘要

PROBLEM TO BE SOLVED: To diagnose the positions or the number of bad timing of an integrated circuit provided with a plurality of processing cores, and diagnosed to be normal in logic but not in timing, and moreover to improve the bad timing on the basis of the positions and the number of the bad timing.;SOLUTION: This improvement apparatus is constituted of a comparison portion 51 for comparing a value captured from a logic circuit for reference 20a into an extraction scan chain for reference 12 by operating a processing core portion 10 for reference on the basis of a first clock signal, with a value captured from a test object logic circuit 20a into a test object extraction scan chain 22 by operating a test object processing core portion 20 on the basis of a second clock signal, a diagnostic portion 54 for diagnosing a bad timing of the test circuit 20a on the basis of the comparison result by the comparison portion 51, and an adjustment portion 56 for adjusting at least one of a delay amount or a second period of the second clock signal if it is diagnosed that a bad timing occurs.;COPYRIGHT: (C)2008,JPO&INPIT