CORRELATED DOUBLE-SAMPLING CIRCUIT AND CYCLIC ANALOG-TO-DIGITAL CONVERTER INCLUDING THE SAME

摘要

The invention is directed generally to a correlated double-sampling (CDS) circuit using a smaller number of capacitors than conventional circuits. In embodiments of the invention, a first portion of the CDS circuit uses just two capacitors to sample the reset voltage, amplify the sampled reset voltage, and subtract a first reference voltage from the amplified reset voltage. A second portion of the CDS circuit uses just two capacitors to sample the signal voltage, amplify the sampled signal voltage, and subtract a second reference voltage from the amplified signal voltage. Embodiments of the invention also provide a cyclic analog-to-digital converter (ADC) including the CDS circuit.