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Semiconductor integrated circuit devices having single crystalline thin film transistors and methods of fabricating the same

机译:具有单晶薄膜晶体管的半导体集成电路器件及其制造方法

摘要

Semiconductor integrated circuit devices having single crystalline thin film transistors and methods of fabricating the same are provided. The semiconductor integrated circuit devices include an interlayer insulating layer formed on a semiconductor substrate and a single crystalline semiconductor plug penetrating the interlayer insulating layer. A single crystalline semiconductor body pattern is provided on the interlayer insulating layer. The single crystalline semiconductor body pattern has an elevated region and contacts the single crystalline semiconductor plug. The method of forming the single crystalline semiconductor body pattern having the elevated region includes forming a sacrificial layer pattern covering the single crystalline semiconductor plug on the interlayer insulating layer. A capping layer is formed to cover the sacrificial layer pattern and the interlayer insulating layer, and the capping layer is patterned to form an opening which exposes a portion of the sacrificial layer pattern. Subsequently, the sacrificial layer pattern is selectively removed to form a cavity in the capping layer, and a planarized single crystalline semiconductor body pattern is formed to fill the cavity and the opening.
机译:提供了具有单晶薄膜晶体管的半导体集成电路器件及其制造方法。半导体集成电路器件包括:形成在半导体基板上的层间绝缘层;以及贯穿该层间绝缘层的单晶半导体栓塞。在层间绝缘层上提供单晶半导体主体图案。单晶半导体主体图案具有升高的区域并且接触单晶半导体栓塞。形成具有升高区域的单晶半导体主体图案的方法包括在层间绝缘层上形成覆盖单晶半导体栓塞的牺牲层图案。形成覆盖层以覆盖牺牲层图案和层间绝缘层,并且对覆盖层进行图案化以形成暴露牺牲层图案的一部分的开口。随后,选择性地去除牺牲层图案以在覆盖层中形成空腔,并且形成平坦化的单晶半导体本体图案以填充空腔和开口。

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