A clock synchronizer for effectuating data transfer between first and second clock domains by utilizing first and second synchronizer controllers. The first synchronizer controller circuit operates in the first clock domain which has N first clock cycles and the second synchronizer controller circuit operates in the second clock domain which has M second clock cycles, wherein N/M=1. Inversion circuitry inverts a first clock signal associated with the first clock domain to generate an inverted first clock signal which is used in effectuating a SYNC pulse during coincident edges of the inverted first clock signal and a second clock signal associated with the second clock domain.
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