WAFER BACKSIDE METAL LAYER ROUTING METHOD, STRUCTURE OF THE SAME, CHIP PACKAGE STACKING METHOD, AND CHIP PACKAGE STACKING STRUCTURE THEREOF

摘要

A structure setting for accumulating a chip package is closed in the recessed pattern being etched by laser at one gap handle of generation is avoided by forming a metal interconnection. Semiconductor piece is formed in a chip (301). Multiple recessed pattern components are recessed in the rear portion of chip. One lower insulation layer (341) is formed in the rear portion of chip, is positioned at a part in addition to the recessed pattern part of a contact wafers in its adjacent bed. One passivation layer (311) is formed in the recess of recessed pattern part, and metal is filled in passivation layer. Recessed pattern part can be formed by an etch process, use laser.