METHOD OF FORMING DUAL DAMASCENE PATTERN IN A SEMICONDUCTOR DEVICE

摘要

A method for forming a dual damascene pattern of a semiconductor device is provided to perform once an etch process by performing a double patterning process. An interlayer dielectric is formed on a lower structure of a semiconductor substrate. A first photoresist pattern(206) is formed on the interlayer dielectric to define a via hole region on the interlayer dielectric. A low-temperature oxide layer(208) is formed on the semiconductor substrate including the first photoresist pattern. A second photoresist pattern(210) is formed on the low-temperature oxide layer to define a wiring trench region. A via hole and a wiring trench are formed in the interlayer dielectric by etching the semiconductor substrate including the first photoresist pattern, the low-temperature oxide layer, and the second photoresist pattern.