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Trench transistor has active area which is enclosed by edge trench in which edge electrode is embedded, where active area has mesa structure which partly limits on edge trench
Trench transistor has active area which is enclosed by edge trench in which edge electrode is embedded, where active area has mesa structure which partly limits on edge trench
The trench transistor has an active area which is enclosed by an edge trench (2) in which an edge electrode (11), placed on a gate potential, is embedded. An active area has a mesa structure (3), which partly limits on the edge trench. The area of the mesa structure is partly, electrically deactivated, as the mesa structure is covered with a mesa-insulating layer within the deactivated range and no source area is provided within the deactivated range. An independent claim is included for a method for the production of a trench transistor.
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