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A memory system having a time control circuit and a method for the exchange of data and clock signals between a memory control unit and a memory device
A memory system having a time control circuit and a method for the exchange of data and clock signals between a memory control unit and a memory device
The present invention relates to a memory system with a control unit and a memory device with a communication channel with a data path and a clock path, which couple the control unit with the memory device. The communication channel has different travel times for the data path and the clock path of which an information signal and a clock signal between the control unit and the memory device exchange. The clock signals to determine the value of the information signal is used, and a timing circuit, which is connected with the communication channel, is compensated for in a function of a compensation signal to an input of the delay between the data path and the clock path for the exchange of an information signal and a clock signal between the control unit and the memory device.
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