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Warpage preventing circuit substrate for semiconductor package, has warpage preventing region comprising warpage pattern formed in adjacent corners of substrate and warpage elements provided in diagonal direction of corners
Warpage preventing circuit substrate for semiconductor package, has warpage preventing region comprising warpage pattern formed in adjacent corners of substrate and warpage elements provided in diagonal direction of corners
The circuit substrate (100) has warpage preventing region (104) provided in the edges of the substrate and conducting region (102) provided in the center of the substrate. The warpage preventing region has warpage preventing pattern (P1,P2) formed in the adjacent corners of the substrate. The warpage preventing elements (L0-L2) is provided in the diagonal direction of the corners. Independent claims are included for the following: (1) semiconductor package; and (2) fabricating method of warpage preventing circuit substrate.
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