首页> 外国专利> Warpage preventing circuit substrate for semiconductor package, has warpage preventing region comprising warpage pattern formed in adjacent corners of substrate and warpage elements provided in diagonal direction of corners

Warpage preventing circuit substrate for semiconductor package, has warpage preventing region comprising warpage pattern formed in adjacent corners of substrate and warpage elements provided in diagonal direction of corners

机译:用于半导体封装的防翘曲电路基板,具有防翘曲区域,该防翘曲区域包括形成在基板的相邻拐角中的翘曲图案和设置在拐角的对角线方向上的翘曲元件。

摘要

The circuit substrate (100) has warpage preventing region (104) provided in the edges of the substrate and conducting region (102) provided in the center of the substrate. The warpage preventing region has warpage preventing pattern (P1,P2) formed in the adjacent corners of the substrate. The warpage preventing elements (L0-L2) is provided in the diagonal direction of the corners. Independent claims are included for the following: (1) semiconductor package; and (2) fabricating method of warpage preventing circuit substrate.
机译:电路基板(100)具有设置在基板的边缘的防翘曲区域(104)和设置在基板的中央的导电区域(102)。防翘曲区域具有形成在基板的相邻拐角处的防翘曲图案(P1,P2)。防翘曲元件(L0-L2)沿拐角的对角线方向设置。包括以下方面的独立权利要求:(1)半导体封装; (2)防翘曲电路基板的制造方法。

著录项

  • 公开/公告号DE102007048007A1

    专利类型

  • 公开/公告日2008-04-30

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号DE20071048007

  • 发明设计人 LEE DAE-HO;

    申请日2007-09-27

  • 分类号H01L23/498;H01L23/12;H01L21/58;

  • 国家 DE

  • 入库时间 2022-08-21 19:49:09

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