首页>
外国专利>
device and method for managing transactions to read and write to eeprom memory or flash memory
device and method for managing transactions to read and write to eeprom memory or flash memory
展开▼
机译:用于管理对eeprom存储器或闪存进行读写的事务的设备和方法
展开▼
页面导航
摘要
著录项
相似文献
摘要
The present invention provides a data processing apparatus and method for processing transactions. The data processing apparatus has a non-volatile memory having a plurality of addresses at which data values can be stored, and a processor operable to process a transaction containing a sequence of update operations, each update operation identifying a target address in the non-volatile memory and a corresponding updated data value to be stored at that address. The processor is required to either complete the transaction in full or else disregard the entire transaction. The data processing apparatus further provides a volatile memory having a number of slots operable to temporarily store one or more updated data values, and mapping logic having a register associated with each slot, each register being programmable by the processor to identify an address range in the non-volatile memory to be mapped to the associated slot. The processor is operable when performing each update operation to ensure that one of the registers identifies an address range incorporating the target address for that update operation, such that when the target address is output to the mapping logic, the mapping logic will identify the relevant register having an address range that incorporates that target address and based thereon generate a remapped target address that causes the corresponding updated data value to be stored in the associated slot of the volatile memory rather than in the non-volatile memory. Any read addresses for read operations contained within the transaction are also routed via the mapping logic so that if they are seeking to access a data value that has already been updated, the address will be remapped to ensure that the updated data value is read from the volatile memory. Further, the processor is operable, upon detection of one or more predetermined events, to cause the updated data values in the volatile memory to be stored in the non-volatile memory at the associated target addresses. IMAGE IMAGE
展开▼