首页> 外国专利> SEMICONDUCTOR DEVICE HAVING BIT LINE LANDING PAD AND BORDERLESS CONTACT ON BIT LINE STUD WITH LOCALIZED ETCH STOP MATERIAL LAYER AND FABRICATING METHOD THEREOF

SEMICONDUCTOR DEVICE HAVING BIT LINE LANDING PAD AND BORDERLESS CONTACT ON BIT LINE STUD WITH LOCALIZED ETCH STOP MATERIAL LAYER AND FABRICATING METHOD THEREOF

机译:具有局部刻蚀停止层的位线着陆垫和无边界接触位线螺柱的半导体器件及其制造方法

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor device which has a bit line landing pad and a borderless contact with a localized etch-stop material layer and has a relatively dense structure, and a fabricating method thereof.;SOLUTION: Inter-layer constact studs 220a and 220b are formed, and a conductive line 222 is provided over the inter-layer contact stud 220b. A first etch-stop material layer 224a and a second etch-stop material layer 224b are selectively provided over them. The conductive line 222 is provided with a side wall insulating film 226. Material of the first etch-stop material layer and that of the side wall insulating film are different by etch selectivity. These etch-stop material layers allow outgassing of impurities during subsequent processes and serve as an alignment target when forming an upper contact hole 229a.;COPYRIGHT: (C)2009,JPO&INPIT
机译:解决的问题:提供一种半导体器件及其制造方法,该半导体器件具有位线着陆焊盘并且与局部蚀刻停止材料层无边界地接触并且具有相对致密的结构;并且,其制造方法。形成220a和220b,并且在层间接触柱220b上方提供导线222。在其上方选择性地设置第一蚀刻停止材料层224a和第二蚀刻停止材料层224b。导线222设置有侧壁绝缘膜226。第一蚀刻终止材料层的材料和侧壁绝缘膜的材料的蚀刻选择性不同。这些蚀刻停止材料层允许杂质在后续工艺中脱气,并在形成上接触孔229a时用作对准目标。版权所有:(C)2009,JPO&INPIT

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号