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Semiconductor device having bit line landing pad and borderless contact on the bit line stud with localized etch stop layer formed in void region, and manufacturing method thereof
Semiconductor device having bit line landing pad and borderless contact on the bit line stud with localized etch stop layer formed in void region, and manufacturing method thereof
An etch-stop layer is selectively provided between layers of a multiple-layered circuit in a selective manner so as to allow for outgassing of impurities during subsequent fabrication processes. The etch-stop layer is formed over an underlying stud so as to serve as an alignment target during formation of an overlying stud formed in an upper layer. In this manner multiple-layered circuits, for example memory devices, can be fabricated in relatively dense configurations.
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