首页> 外国专利> Semiconductor device having bit line landing pad and borderless contact on the bit line stud with localized etch stop layer formed in void region, and manufacturing method thereof

Semiconductor device having bit line landing pad and borderless contact on the bit line stud with localized etch stop layer formed in void region, and manufacturing method thereof

机译:在位线柱上具有位线连接盘和无边界接触的半导体器件及其制造方法,该半导体器件及其制造方法在位线柱上具有局部蚀刻停止层

摘要

An etch-stop layer is selectively provided between layers of a multiple-layered circuit in a selective manner so as to allow for outgassing of impurities during subsequent fabrication processes. The etch-stop layer is formed over an underlying stud so as to serve as an alignment target during formation of an overlying stud formed in an upper layer. In this manner multiple-layered circuits, for example memory devices, can be fabricated in relatively dense configurations.
机译:蚀刻停止层以选择性的方式选择性地设置在多层电路的层之间,以允许在随后的制造过程中除气。蚀刻停止层形成在下面的柱上,以在形成在上层中形成的覆盖柱期间用作对准目标。以这种方式,可以以相对密集的配置来制造多层电路,例如存储器件。

著录项

  • 公开/公告号KR100389924B1

    专利类型

  • 公开/公告日2003-07-04

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20010004224

  • 发明设计人 양원석;송상호;김기남;정홍식;

    申请日2001-01-30

  • 分类号H01L27/10;

  • 国家 KR

  • 入库时间 2022-08-21 23:45:20

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