首页> 外国专利> Highly integrated circuit device manufacturing for the mask, its layout generation method, highly integrated circuit device manufacturing method using the manufacturing method and this

Highly integrated circuit device manufacturing for the mask, its layout generation method, highly integrated circuit device manufacturing method using the manufacturing method and this

机译:用于掩模的高度集成电路器件的制造,其布局生成方法,使用该制造方法的高度集成电路器件的制造方法以及该方法

摘要

A method of creating a layout of a set of masks including an alternating phase shifting mask (APSM) and a halftone phase shifting trim mask (HPSTM) is provided. The APSM includes first and second phase shifting areas and a first opaque pattern. The first and second phase shifting areas are disposed adjacent to each other and have different phases for generating destructive interference. Further, the first and second phase shifting areas define an access interconnection line. The first opaque pattern is formed on a transparent substrate to define the first and second phase shifting areas. The HPSTM includes a second opaque pattern on the transparent substrate and a halftone pattern. The second opaque pattern prevents an access interconnection line from being erased. The halftone pattern defines a pass interconnection line connected to the access interconnection line.
机译:提供一种创建包括交替相移掩模(APSM)和半色调相移微调掩模(HPSTM)的掩模组的布局的方法。 APSM包括第一和第二相移区域以及第一不透明图案。第一和第二相移区域彼此相邻布置并且具有不同的相位以产生相消干涉。此外,第一和第二相移区域限定访问互连线。第一不透明图案形成在透明基板上,以限定第一和第二相移区域。 HPSTM在透明基板上包括第二不透明图案和半色调图案。第二不透明图案防止访问互连线被擦除。半色调图案定义了连接到访问互连线的通过互连线。

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