首页> 外国专利> IMPROVED SPLIT GATE TYPE NON-VOLATILE FLASH MEMORY CELL AND ARRAY WHICH HAVE FLOATING GATE, CONTROL GATE, SELECTION GATE, AND ERASE GATE WITH OVERHANG ON FLOATING GATE, AND METHOD FOR MANUFACTURING

IMPROVED SPLIT GATE TYPE NON-VOLATILE FLASH MEMORY CELL AND ARRAY WHICH HAVE FLOATING GATE, CONTROL GATE, SELECTION GATE, AND ERASE GATE WITH OVERHANG ON FLOATING GATE, AND METHOD FOR MANUFACTURING

机译:具有浮动栅,控制栅,选择栅和在浮动栅上悬空擦除栅的改进型分裂栅型非易失性闪存存储单元和阵列及其制造方法

摘要

PPROBLEM TO BE SOLVED: To improve the efficiency of erasing a cell by the specific dimensional relation of an erase gate with a floating gate. PSOLUTION: An improved split gate type non-volatile memory cell having in a substrate a second conductivity first region, a second conductivity second region, and a channel region between the first region and the second region is formed in a substantially single crystal substrate of the first conductivity type. The cell has a selection gate on the upper portion of the channel region, a floating gate on another portion of the channel, a control gate on the floating gate, and an erase gate adjoining the floating gate. The erase gate has an overhang extending over the floating gate. The ratio of the dimension of the overhang against the dimension of a separation in the vertical direction between the floating gate and the erase gate is in between about 1.0 and 2.5. PCOPYRIGHT: (C)2009,JPO&INPIT
机译:

要解决的问题:通过擦除栅与浮栅的特定尺寸关系,提高擦除单元的效率。

解决方案:改进的分裂栅型非易失性存储单元在基板中具有基本上单晶的第二导电性第一区域,第二导电性第二区域以及在第一区域和第二区域之间的沟道区域。第一导电类型的衬底。该单元在沟道区的上部具有选择栅,在沟道的另一部分具有浮栅,在浮栅上具有控制栅,以及与浮栅相邻的擦除栅。擦除栅极具有在浮置栅极上方延伸的突出端。悬垂尺寸与浮置栅极和擦除栅极之间的垂直方向上的间隔的尺寸之比在大约1.0至2.5之间。

版权:(C)2009,日本特许厅&INPIT

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