Primitives for extending the speculative execution of a thread-level

摘要

The processor may include an atomic update table and address table monitoring to support speculative threading. The processor may also include one or more registers to maintain the state associated with the execution of speculative threads. Instructions for reading instructions for triggering the commit memory update instructions for writing the register (state, buffered primitives, the status register state, and / or processor, a trap / exception / interrupt processing It is possible to support one or more of the instruction) to clear one of the state bits associated to. I set forth in the claims herein and other examples.