System and method for counting the leading one and leading zeros in a digital signal processor

摘要

System and method for counting the leading one and leading zeros in [challenge] digital signal processor. Method is disclosed and [SOLUTION] system, and includes an execution unit that can be used to count the leading zeros in the data word. In operation, the execution unit is able to receive data words having a width of 2 N. Furthermore, can sign extended to data words having a width one o'clock in the M-th power of 2 data words, execution unit, N is greater than M. The data word, it can be input to the counter having a width of M-th power of 2, can be in order to obtain results, to count the leading zeros in the data word in the temporary counter time. [Selection Figure Figure 2