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Method of preventing dielectric breakdown of semiconductor device and semiconductor device preventing dielectric breakdown

机译:防止半导体器件的介电击穿的方法和防止介质击穿的半导体器件

摘要

A semiconductor device that prevents a build-up of electrostatic charge in a dummy pad is provided. The semiconductor device may contain an internal circuit formed on a semiconductor substrate and the dummy pad which is not electrically connected to the internal circuit. The semiconductor device may further include a seal ring that surrounds the internal circuit and the dummy pad, where the seal ring is electrically connected to the semiconductor substrate and includes a pattern in a first metal layer, a contact between the pattern in the first metal layer and the semiconductor substrate, patterns in upper metal layers stacked above the pattern in the first metal layer, and multiple electrical contacts between the patterns in the first metal layer and the upper metal layers, in which the dummy pad is electrically connected to the seal ring.
机译:提供了一种防止静电荷在伪焊盘中积聚的半导体器件。半导体器件可以包含形成在半导体衬底上的内部电路和不电连接到内部电路的伪焊盘。半导体器件可以进一步包括密封环,该密封环围绕内部电路和虚设焊盘,其中该密封环电连接到半导体衬底,并且包括在第一金属层中的图案,在第一金属层中的图案之间的接触。半导体基板,层叠在第一金属层中的图案上方的上部金属层中的图案,以及第一金属层和上部金属层中的图案之间的多个电接触,其中虚设焊盘电连接至密封环。

著录项

  • 公开/公告号US7567484B2

    专利类型

  • 公开/公告日2009-07-28

    原文格式PDF

  • 申请/专利权人 TSUNEO OCHI;

    申请/专利号US20070790035

  • 发明设计人 TSUNEO OCHI;

    申请日2007-04-23

  • 分类号G11C8;

  • 国家 US

  • 入库时间 2022-08-21 19:30:51

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