A system, apparatus and a method for implementing multifunctional memories is disclosed. The multifunctional memories perform a variety of functions during execution of extended instructions in a reconfigurable data path processor composed of processing nodes. In one embodiment, a processing node can be comprised of modular processing elements to perform computations associated with an extended instruction. Also, such a node includes at least two multifunctional memories and a data flow director configured to selectably couple the first multifunctional memory and the second multifunctional memory. The data flow director is configured to route data out from a first multifunctional memory of the two multifunctional memories while data is being routed into a second multifunctional memory. In another embodiment, a processing node is configured to compute a function output based on a number of Boolean functions, wherein at least one of the multifunctional memories is configured as a look-up table (“LUT”).
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