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Stacked dual MOSFET package

机译:堆叠双MOSFET封装

摘要

A stacked dual MOSFET package is disclosed. The package includes a first conductive tab; a high side MOSFET die coupled to the first conductive tab such that a drain of the high side MOSFET die is electrically coupled to the first conductive tab; a second conductive tab electrically coupled to a source of the high side MOSFET die in overlaying relationship; a low side MOSFET die coupled to the second conductive tab such that a source of the low side MOSFET die is electrically coupled to the second conductive tab; a first lead coupled to a gate of the high side MOSFET die; at least one second lead coupled to the first conductive tab; at least one third lead coupled to a source of the low side MOSFET die; a fourth lead coupled to a gate of the low side MOSFET die; and an encapsulant covering portions of the first conductive tab, the high side MOSFET die, portions of the second conductive tab, the low side MOSFET die, and portions of the first lead, the at least one second lead, the at least one third lead, and the fourth lead.
机译:公开了一种堆叠的双MOSFET封装。封装包括第一导电接线片;第一导电接线片;和第二导电接线片。高侧MOSFET管芯耦合到第一导电接线片,使得高侧MOSFET管芯的漏极电耦合到第一导电接线片;第二导电接线片以重叠关系电耦合到高端MOSFET管芯的源极;低侧MOSFET管芯耦合到第二导电接线片,使得低侧MOSFET管芯的源极电耦合到第二导电接线片;第一引线耦合到高端MOSFET管芯的栅极;至少一个第二引线耦合到第一导电接线片;至少三分之一的引线耦合到低压侧MOSFET管芯的源极;第四引线耦合到低侧MOSFET管芯的栅极;密封剂覆盖第一导电接线片,高侧MOSFET管芯的部分,第二导电接线片,低侧MOSFET管芯的部分以及第一引线,至少一个第二引线,至少一个第三引线的部分,以及第四名。

著录项

  • 公开/公告号US7485954B2

    专利类型

  • 公开/公告日2009-02-03

    原文格式PDF

  • 申请/专利权人 SANJAY HAVANUR;

    申请/专利号US20060518546

  • 发明设计人 SANJAY HAVANUR;

    申请日2006-09-07

  • 分类号H01L23/02;

  • 国家 US

  • 入库时间 2022-08-21 19:28:59

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