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INFORMATION PROCESSING USING BINARY GATES STRUCTURED BY CODE-SELECTED PASS TRANSISTORS

机译:使用由代码选择的晶体管构成的二进制门进行信息处理

摘要

A processing space contains an array of operational transistors interconnected by circuit and signal pass transistors that when supplied with selected enable bits will structure a variety of circuits that will carry out any desired information processing A code is defined that will identify the physical locations of every transistor in the processing space, which code will enable only selected ones of the pass transistors therein so as to structure the circuits needed for any algorithm sought to be executed The circuits so structured operate independently of and in parallel with every other circuit so structured, and are restructured after each step into another group of circuits, so that almost all of the processing space can be devoted entirely to information processing The apparatus is also superscalable, meaning that an Instant Logic Apparatus could be built to have any size, speed, and level of computer power as might be desired.
机译:一个处理空间包含一个由电路和信号传输晶体管互连的运算晶体管阵列,当它们提供有选定的使能位时,将构成各种电路,这些电路将执行任何所需的信息处理。在处理空间中,该代码将仅启用其中的传输晶体管中的选定一个,以便构造任何试图执行的算法所需的电路。如此构造的电路独立于并与如此构造的每个其他电路并行运行,并且在每个步骤之后将其重组为另一组电路,从而几乎所有处理空间都可以完全用于信息处理。该设备也是可扩展的,这意味着即时逻辑设备可以构建为具有任何大小,速度和级别。可能需要的计算机电源。

著录项

  • 公开/公告号WO2008042186B1

    专利类型

  • 公开/公告日2008-11-27

    原文格式PDF

  • 申请/专利权人 LOVELL WILLIAM S.;

    申请/专利号WO2007US20773

  • 发明设计人 LOVELL WILLIAM S.;

    申请日2007-09-25

  • 分类号G06F7/38;

  • 国家 WO

  • 入库时间 2022-08-21 19:21:45

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