首页> 外国专利> METHOD OF ETCHING DOPED SILICON DIOXIDE WITH SELECTIVITY TO UNDOPED SILICON DIOXIDE WITH A HIGH DENSITY PLASMA ETCHER

METHOD OF ETCHING DOPED SILICON DIOXIDE WITH SELECTIVITY TO UNDOPED SILICON DIOXIDE WITH A HIGH DENSITY PLASMA ETCHER

机译:用高密度等离子体刻蚀选择性掺杂非掺杂二氧化硅的方法。

摘要

Disclosed is a process for removing doped silicon dioxide from a structure selectively to undoped silicon dioxide. A structure having both doped and undoped silicon dioxide regions is exposed to a high density plasma etch having a fluorinated etch chemistry. Doped silicon dioxide is preferably removed thereby at a rate 10 times or more greater than that of undoped silicon dioxide. The etch is conducted in a chamber having an upper electrode to which a source power is applied and a lower electrode to which a bias power is applied sufficient to generate a power density on a surface of the structure such that the source power density is in a range less than or equal to about 1000 W per 200-mm diameter wafer surface. The high density plasma etch has an ion density not less than about 109 ions/cm3. A variety of structures are formed with the etch process, including self-aligned contacts to a semiconductor substrate.
机译:公开了一种从结构中选择性地去除未掺杂的二氧化硅中去除掺杂的二氧化硅的方法。具有掺杂和未掺杂的二氧化硅区域的结构被暴露于具有氟化蚀刻化学物质的高密度等离子体蚀刻。从而优选以比未掺杂的二氧化硅大10倍以上的速率除去掺杂的二氧化硅。蚀刻在具有上电极和下电极的腔室中进行,该上电极被施加了源极功率并且该下电极被施加了偏置功率,该偏置电极足以在结构的表面上产生功率密度,使得源极功率密度为n。每200毫米直径的晶片表面的功率范围小于或等于约1000W。高密度等离子体蚀刻的离子密度不小于约10 9离子/ cm 3。通过蚀刻工艺形成各种结构,包括与半导体衬底的自对准接触。

著录项

  • 公开/公告号EP1110238B1

    专利类型

  • 公开/公告日2009-01-07

    原文格式PDF

  • 申请/专利权人 MICRON TECHNOLOGY INC.;

    申请/专利号EP19980938028

  • 发明设计人 KO KEI-YU;

    申请日1998-07-23

  • 分类号H01L21/311;

  • 国家 EP

  • 入库时间 2022-08-21 19:19:20

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