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METHOD OF FORMING A DUAL DAMASCENE PATTERN IN SEMICONDUCTOR DEVICE

机译:在半导体器件中形成双重大马士革图案的方法

摘要

A kind of method, the dual damascene pattern for being used to form semiconductor device are arranged to minimize a sputter etch characteristic by minimizing the energetic ion energy in terms of forming a dual damascene pattern. One interlayer insulating film (102) is formed in semi-conductive substrate (100). One contact hole (106) is formed by etching interlayer insulating film. It includes contact hole that one protective film, which is formed in interlayer insulating film, for filling contact hole. Protective film, the interlayer insulating film in the region that a bar ditch (112) are formed on it, is etched. Ditch forms wide width by the interlayer insulating film for being isotropically etched an exposure than contact hole with one.
机译:一种方法,用于形成半导体器件的双金属镶嵌图案被布置为通过在形成双金属镶嵌图案方面最小化高能离子能量来最小化溅射蚀刻特性。在半导体基板(100)上形成一层层间绝缘膜(102)。通过蚀刻层间绝缘膜形成一个接触孔(106)。它包括接触孔,在层间绝缘膜中形成一层保护膜以填充接触孔。蚀刻保护膜,即在其上形成有条形沟槽(112)的区域中的层间绝缘膜。与各接触孔相比,通过各向同性蚀刻曝光而通过层间绝缘膜形成宽的沟。

著录项

  • 公开/公告号KR20090042435A

    专利类型

  • 公开/公告日2009-04-30

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20070108191

  • 发明设计人 AHN MYUNG KYU;

    申请日2007-10-26

  • 分类号H01L21/28;

  • 国家 KR

  • 入库时间 2022-08-21 19:13:32

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