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Fine-pitch ball grid array package

机译:细间距球栅阵列封装

摘要

An FBGA(Fine line Ball Grid Array) package is provided to reduce the loss of process time required for attaching a semiconductor chip on a printed circuit board by forming a pattern with a preset shape on the printed circuit board. A printed circuit board(216) has a cavity(200) at the center thereof and a circuit wiring including a bond finger(222) and a ball land. A semiconductor chip is attached on an upper surface of the printed circuit board in a face-down type. Bonding pads(218) are arranged on the center of the semiconductor chip. A metal wire electrically connects the bonding pad of the semiconductor chip to the bond finger by passing through the cavity. An encapsulant encapsulates the upper surface of the printed circuit board including the semiconductor chip and the cavity of the printed circuit board including the metal wire. A solder ball is attached to the ball land on a lower surface of the printed circuit board. The printed circuit board is provided with a plating line for forming the circuit wiring on the arrangement of the bonding pads and the outermost bond finger with a step.
机译:提供了FBGA(细线球栅阵列)封装,以通过在印刷电路板上形成具有预定形状的图案来减少将半导体芯片附着在印刷电路板上所需的处理时间的损失。印刷电路板(216)在其中心具有空腔(200)以及包括键合指(222)和球形焊盘的电路布线。半导体芯片以面朝下的方式安装在印刷电路板的上表面上。焊盘(218)布置在半导体芯片的中央。金属线穿过空腔,将半导体芯片的键合焊盘电连接到键合指。密封剂密封包括半导体芯片的印刷电路板的上表面和包括金属线的印刷电路板的腔。焊球附接到印刷电路板下表面上的焊球焊盘上。印刷电路板上设置有电镀线,该电镀线用于在接合焊盘和最外侧的接合指的配置上形成阶梯状地形成电路配线。

著录项

  • 公开/公告号KR100900229B1

    专利类型

  • 公开/公告日2009-06-02

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20060120925

  • 发明设计人 하성권;

    申请日2006-12-01

  • 分类号H01L23/48;

  • 国家 KR

  • 入库时间 2022-08-21 19:11:54

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