首页> 外国专利> Method for preventing Kirkendall void formation for packages fabricated by joining an electronic component finished with electroplated Cu containing sulfur to solder and electronic packages fabricated by using the same

Method for preventing Kirkendall void formation for packages fabricated by joining an electronic component finished with electroplated Cu containing sulfur to solder and electronic packages fabricated by using the same

机译:防止通过将含硫的电镀铜完成的电子部件接合到焊料上而制成的封装件上形成柯肯达尔空隙的方法以及使用该封装件制成的电子封装件

摘要

Disclosed is a method for inhibiting Kirkendall voids from being generated inside Cu3 Sn in-termetallic compound or at interface between Cu and Cu3 Sn by adding sulfide forming elements to solder containing Pb ingredient used for bonding electronic components to the solder as well as Pb free solder, so as to improve reliability of electronic packages fabricated by the same. The present inventive method can efficiently inhibit formation of Kirkendall voids, which are frequently generated at solder joints of the electronic packages, thereby improving electrical, mechanical and/or thermal reliability of the packages.
机译:公开了一种通过将硫化物形成元素添加到用于将电子部件结合到焊料的含Pb成分的焊料中以及不含Pb的焊料,来抑制在Cu3 Sn金属间化合物内部或Cu与Cu3 Sn之间的界面处产生Kirkendall空隙的方法。 ,以提高由其制造的电子封装的可靠性。本发明的方法可以有效地抑制在电子封装的焊点处经常产生的柯肯德尔空隙的形成,从而提高封装的电,机械和/或热可靠性。

著录项

  • 公开/公告号KR100922891B1

    专利类型

  • 公开/公告日2009-10-22

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20070120103

  • 发明设计人 유진;김종연;

    申请日2007-11-23

  • 分类号H01L21/60;H01L23/48;

  • 国家 KR

  • 入库时间 2022-08-21 19:11:32

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