CIRCUIT ANALYSIS METHOD, METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT, CIRCUIT ANALYSIS PROGRAM AND CIRCUIT ANALYSIS DEVICE

摘要

PPROBLEM TO BE SOLVED: To perform timing analysis with high analytic precision while shortening a TAT. PSOLUTION: A circuit analysis device 10 performs a timing analysis to a design target circuit after a layout change. The circuit analysis device 10 includes a storage device 13 in which an extraction range reference 41 is set, an extraction range setting part 1 and a timing analysis part. The extraction setting part 1 sets the extraction range reference 41 including a layout-changed portion as a parasitic element extraction target range 100. The timing analysis parts 2, 4 and 6 perform timing analysis by using, as an analysis target, predetermined ranges 100, 200 and 300 including a parasitic element extracted from an extraction target range 100. PCOPYRIGHT: (C)2010,JPO&INPIT