首页> 外国专利> Semiconductor Device Portion Having Sub-Wavelength-Sized Gate Electrode Conductive Structures Formed from Linear Shaped Gate Electrode Layout Features Defined Along At Least Four Gate Electrode Tracks with Minimum End-to-End Spacing and Having Corresponding Non-Symmetric Diffusion Regions

Semiconductor Device Portion Having Sub-Wavelength-Sized Gate Electrode Conductive Structures Formed from Linear Shaped Gate Electrode Layout Features Defined Along At Least Four Gate Electrode Tracks with Minimum End-to-End Spacing and Having Corresponding Non-Symmetric Diffusion Regions

机译:半导体器件部分具有亚波长尺寸的栅电极导电结构,该结构由线性形状的栅电极布局特征形成,沿至少四个栅电极轨道定义,具有最小的端到端间距,并具有相应的非对称扩散区域

摘要

A semiconductor device includes a substrate portion having a plurality of diffusion regions defined therein in a non-symmetrical manner relative to a virtual line defined to bisect the substrate portion. The semiconductor device includes a gate electrode level region including a number of conductive features defined to extend in only a first parallel direction. Adjacent ones of the conductive features that share a common line of extent in the first parallel direction are fabricated from respective originating layout features separated by an end-to-end spacing having a size that is substantially equal across the gate electrode level region and is minimized to an extent allowed by a semiconductor device manufacturing capability. Conductive features are defined along at least four different virtual lines of extent in the first parallel direction. A width of the conductive features is less than a wavelength of light used in a photolithography process for their fabrication.
机译:半导体器件包括衬底部分,该衬底部分具有相对于被定义为将衬底部分一分为二的虚拟线以非对称的方式在其中限定的多个扩散区域。半导体器件包括栅电极级区域,该栅电极级区域包括被限定为仅在第一平行方向上延伸的多个导电特征。在第一平行方向上具有共同的延伸范围线的导电特征中的相邻导电特征是由各自的始发布局特征制造的,所述始发布局特征被端到端的间隔所隔开,该端到端的间隔在栅电极级区域上具有基本相等的尺寸并且被最小化达到半导体器件制造能力所允许的程度。沿着第一平行方向沿着至少四个不同的虚拟延伸线定义导电特征。导电部件的宽度小于用于其制造的光刻工艺中使用的光的波长。

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