Semiconductor integrated circuit design method for determining thickness of wiring based on plural factors contributing to thickness of wiring

摘要

A semiconductor integrated circuit design method, includes modeling a layer thickness of a wiring by a function including as independent variables, a percentage of surface area of the wiring in a first two-dimensional region where the wiring is formed, and a percentage of surface area for elements other than the wiring in a second two-dimensional region, and designing the wiring based on the wiring modeled.