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Method for manufacturing SrTiO3 series varistor using grain boundary segregation

机译:利用晶界偏析制造SrTiO 3 系列压敏电阻的方法

摘要

The present invention relates to a method for manufacturing a SrTiO3 series varistor using grain boundary segregation, and more particularly, to a method for manufacturing a SrTiO3 series varistor by sintering a powdered composition in which acceptors such as Al and Fe are added in powdered form and then sintered under a reducing atmosphere and heat-treated them in the air to selectively form electrical conduction barriers at grain boundaries in a process for manufacturing SrTiO3 series varistor having an excellent non-linear coefficient and a breakdown voltage suitable for use.
机译:本发明涉及一种利用晶界偏析制造SrTiO 3 系列压敏电阻的方法,更具体地,涉及一种通过烧结硅酸盐制备SrTiO 3 系列压敏电阻的方法。粉末状的组合物,其中以粉末形式添加受体(例如Al和Fe),然后在还原性气氛下烧结,并在空气中进行热处理,以在制造SrTiO 3 <的过程中选择性地在晶界形成导电势垒具有优良的非线性系数和击穿电压的/系列压敏电阻适合使用。

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