首页>
外国专利>
INTEGRATED CIRCUIT DESIGN IN OPTICAL SHRINK TECHNOLOGY NODE
INTEGRATED CIRCUIT DESIGN IN OPTICAL SHRINK TECHNOLOGY NODE
展开▼
机译:光学收缩技术节点中的集成电路设计
展开▼
页面导航
摘要
著录项
相似文献
摘要
Disclosed is a system, method, and computer-readable medium for designing a circuit and/or IC chip to be provided using an optical shrink technology node. Initial design data may be provided in a first technology node and through the use of embedding scaling factors in one or more EDA tools of the design flow, a design (e.g., mask data) can be generated for the circuit in an optical shrink technology node. Examples of EDA tools in which embedded scaling factors may be provided are simulation models and extraction tools including LPE decks and RC extraction technology files.
展开▼