SEMICONDUCTOR PACKAGE, A SEMICONDUCTOR MODULE, AND A METHOD FOR MANUFACTURING THE SEMICONDUCTOR PACKAGE, CAPABLE OF REDUCING A PHOTOLITHOGRAPHY STEP BY OMITTING A PATTERNING PROCESS OF A SECOND INTERLAYER INSULATION LAYER

摘要

PURPOSE: A semiconductor package, a semiconductor module, and a method for manufacturing the semiconductor package are provided to shorten a process time by omitting a formation process of the second interlayer insulation layer.;CONSTITUTION: An interlayer insulation layer is formed on a semiconductor chip to expose a part of at least one bonding pad(102). At least one rewiring line(110) is extended from at least one bonding pad to the interlayer insulation layer. At least one external connection terminal(112) is connected to at least one rewiring line. The external connection terminal has at least one protrusion. A molding layer is arranged on the interlayer insulation layer and at least one rewiring line to expose a part of one external connection terminal.;COPYRIGHT KIPO 2010